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» Simultaneous Circuit Transformation and Routing
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TON
2008
95views more  TON 2008»
13 years 7 months ago
Integration of explicit effective-bandwidth-based QoS routing with best-effort routing
This paper presents a methodology for protecting low-priority best-effort (BE) traffic in a network domain that provides both virtual-circuit routing with bandwidth reservation for...
Stephen L. Spitler, Daniel C. Lee
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
14 years 27 days ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
FPGA
2003
ACM
123views FPGA» more  FPGA 2003»
14 years 25 days ago
Wire type assignment for FPGA routing
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
NIPS
2007
13 years 9 months ago
An in-silico Neural Model of Dynamic Routing through Neuronal Coherence
We describe a neurobiologically plausible model to implement dynamic routing using the concept of neuronal communication through neuronal coherence. The model has a three-tier arc...
Devarajan Sridharan, Brian Percival, John V. Arthu...
ISPD
1998
ACM
97views Hardware» more  ISPD 1998»
13 years 12 months ago
Device-level early floorplanning algorithms for RF circuits
—High-frequency circuits are notoriously difficult to lay out because of the tight coupling between device-level placement and wiring. Given that successful electrical performan...
Mehmet Aktuna, Rob A. Rutenbar, L. Richard Carley