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» Simultaneous Circuit Transformation and Routing
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VLSID
2002
IEEE
100views VLSI» more  VLSID 2002»
14 years 15 days ago
Layout-Driven Timing Optimization by Generalized De Morgan Transform
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
Supratik Chakraborty, Rajeev Murgai
ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
14 years 1 months ago
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
Li-Chung Hsu, Hung-Ming Chen
FPGA
2008
ACM
168views FPGA» more  FPGA 2008»
13 years 8 months ago
Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
DAC
2002
ACM
14 years 8 months ago
Towards global routing with RLC crosstalk constraints
Conventional global routing minimizes total wire length and congestion. Experiments using large industrial benchmark circuits show that up to 24% of nets in such routing solutions...
James D. Z. Ma, Lei He
DAC
2007
ACM
13 years 11 months ago
Integrated Droplet Routing in the Synthesis of Microfluidic Biochips
Microfluidic biochips are revolutionizing many areas of biochemistry and biomedical sciences. Several synthesis tools have recently been proposed for the automated design of bioch...
Tao Xu, Krishnendu Chakrabarty