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FPL
2004
Springer
72views Hardware» more  FPL 2004»
14 years 4 months ago
Simultaneous Timing Driven Clustering and Placement for FPGAs
Traditional placement algorithms for FPGAs are normally carried out on a fixed clustering solution of a circuit. The impact of clustering on wirelength and delay of the placement s...
Gang Chen, Jason Cong
DAC
1994
ACM
14 years 3 months ago
Performance-Driven Simultaneous Place and Route for Row-Based FPGAs
Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is primarily due to the difficulty in predicting these ...
Sudip Nag, Rob A. Rutenbar
JCP
2008
105views more  JCP 2008»
13 years 10 months ago
Thermal Driven Placement for Island-style MTCMOS FPGAs
Rapid increase in transistor density and operating frequency has led to the increase in power densities, exhibiting itself as a high temperature profile. The high temperature spots...
Javid Jaffari, Mohab Anis
FPL
2005
Springer
136views Hardware» more  FPL 2005»
14 years 4 months ago
Architecture-Adaptive Routability-Driven Placement for FPGAs
Current FPGA placement algorithms estimate the routability of a placement using architecture-specific metrics. The shortcoming of using architecture-specific routability estimates ...
Akshay Sharma, Carl Ebeling, Scott Hauck
DAC
2000
ACM
14 years 11 months ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang