719 search results - page 141 / 144 » Sizing router buffers |
123
Voted
EMSOFT
2007
Springer
15 years 9 months ago
2007
Springer
Design space exploration of embedded systems typically focuses on classical design goals such as cost, timing, buffer sizes, and power consumption. Robustness criteria, i.e. sensi...
136
Voted
LCTRTS
2007
Springer
15 years 9 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
112
Voted
ISCA
2006
IEEE
15 years 9 months ago
2006
IEEE
Thread-level speculation (TLS) has proven to be a promising method of extracting parallelism from both integer and scientific workloads, targeting speculative threads that range ...
130
Voted
MICRO
2006
IEEE
15 years 9 months ago
2006
IEEE
One of the major issues faced by the semiconductor industry today is that of reducing chip yields. As the process technologies have scaled to smaller feature sizes, chip yields ha...
145
Voted
SI3D
2006
ACM
15 years 9 months ago
2006
ACM
Global illumination provides a visual richness not achievable with the direct illumination models used by most interactive applications. To generate global effects, numerous appro...