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ICCD
1995
IEEE
85views Hardware» more  ICCD 1995»
14 years 15 days ago
A high-performance asynchronous SCSI controller
We describe thedesign of a high performance asynchronous SCSI Small Computer Systems Interface controller data path and the associated control circuits. The data path is an asyn...
Kenneth Y. Yun, David L. Dill
ITC
1998
IEEE
61views Hardware» more  ITC 1998»
14 years 1 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
VLSISP
2008
93views more  VLSISP 2008»
13 years 8 months ago
Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path
The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a copr...
Michalis D. Galanis, Gregory Dimitroulakos, Costas...
DAC
2007
ACM
14 years 10 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
JSAC
2008
73views more  JSAC 2008»
13 years 9 months ago
Quasi-Dynamic Network Design Considering Different Service Holding Times
Abstract-- We propose a quasi-dynamic network design algorithm considering traffic growth in multi-layered photonic networks that consist of electrical paths and optical paths. The...
Koichi Kanie, Hiroshi Hasegawa, Ken-ichi Sato