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IESS
2007
Springer
156views Hardware» more  IESS 2007»
14 years 3 months ago
Automatic Data Path Generation from C code for Custom Processors
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspecific architectures...
Jelena Trajkovic, Daniel Gajski
ICNP
2003
IEEE
14 years 2 months ago
On the Cost-Quality Tradeoff in Topology-Aware Overlay Path Probing
Path probing is essential to maintaining an efficient overlay network topology. However, the cost of a full-scale probing is as high as ¢¤£¦¥¨§© , which is prohibitive i...
Chiping Tang, Philip K. McKinley
ICCAD
1994
IEEE
95views Hardware» more  ICCAD 1994»
14 years 1 months ago
Provably correct high-level timing analysis without path sensitization
- This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit ...
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
CNSR
2010
IEEE
140views Communications» more  CNSR 2010»
14 years 29 days ago
Performance Evaluation of Using a Dynamic Shortest Path Algorithm in OLSRv2
—MANET routing protocols are designed to scale up to thousands of routers with frequent changes of the topology. In preference, MANET routing protocols should also support constr...
Ulrich Herberg
CCS
2006
ACM
14 years 22 days ago
Optimizing BGP security by exploiting path stability
The Border Gateway Protocol (BGP) is the de facto interdomain routing protocol on the Internet. While the serious vulnerabilities of BGP are well known, no security solution has b...
Kevin R. B. Butler, Patrick McDaniel, William Aiel...