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GLVLSI
2010
IEEE
149views VLSI» more  GLVLSI 2010»
13 years 10 months ago
Lightweight runtime control flow analysis for adaptive loop caching
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
Marisha Rawlins, Ann Gordon-Ross
RTSS
2005
IEEE
14 years 2 months ago
ParaScale: Exploiting Parametric Timing Analysis for Real-Time Schedulers and Dynamic Voltage Scaling
Static timing analysis safely bounds worst-case execution times to determine if tasks can meet their deadlines in hard real-time systems. However, conventional timing analysis req...
Sibin Mohan, Frank Mueller, William Hawkins, Micha...
ICIP
2007
IEEE
14 years 10 months ago
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
Yen-Lin Lee, Truong Nguyen
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
14 years 2 months ago
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems
—Presented are a methodology and a DFII-based tool for AC-stability analysis of a wide variety of closed-loop continuous-time (operational amplifiers and other linear circuits). ...
Momchil Milev, Rod Burt
DAC
2000
ACM
14 years 9 months ago
Run-time voltage hopping for low-power real-time systems
This paper presents a novel run-time dynamic voltage scaling scheme for low-power real-time systems. It employs software feedback control of supply voltage, which is applicable to...
Seongsoo Lee, Takayasu Sakurai