Sciweavers

3507 search results - page 55 / 702
» Slicing for architectural analysis
Sort
View
CODES
2004
IEEE
14 years 2 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
WORDS
2002
IEEE
14 years 3 months ago
A Static Timing Analysis Environment Using Java Architecture for Safety Critical Real-Time Systems
Certainly, in hard real-time systems, it is reasonable to argue that no hard real-time threads should behave in an unpredictable way and that schedulability should be guaranteed b...
Erik Yu-Shing Hu, Guillem Bernat, Andy J. Wellings
DATE
2008
IEEE
158views Hardware» more  DATE 2008»
14 years 5 months ago
Performance Analysis of SoC Architectures Based on Latency-Rate Servers
This paper presents a method for static performance analysis of SoC architectures. The method is based on a network calculus theory known as LR servers. This network calculus is e...
Jelte Peter Vink, Kees van Berkel, Pieter van der ...
GLOBECOM
2006
IEEE
14 years 4 months ago
Fast Stochastic Analysis of P2P File Distribution Architectures
— In this paper we investigate which is the most efficient architecture and protocol that can be used for file distribution. The focus of the analysis is to understand not only...
Damiano Carra, Renato Lo Cigno, Ernst W. Biersack
OOPSLA
2009
Springer
14 years 5 months ago
Static extraction and conformance analysis of hierarchical runtime architectural structure using annotations
An object diagram makes explicit the object structures that are only implicit in a class diagram. An object diagram may be missing and must extracted from the code. Alternatively,...
Marwan Abi-Antoun, Jonathan Aldrich