223 search results - page 22 / 45 » Snake-Deterministic Tiling Systems |
ISCA
2010
IEEE
14 years 19 days ago
2010
IEEE
The recent paradigm shift to multi-core systems results in high system throughput within a specified power budget. However, future systems still require good single thread perfor...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, th...
LCPC
2004
Springer
14 years 27 days ago
2004
Springer
In this paper, we describe our experience in writing parallel numerical algorithms using Hierarchically Tiled Arrays (HTAs). HTAs are classes of objects that encapsulate parallelis...
IPPS
2003
IEEE
14 years 25 days ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
27
Voted
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...