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» SoC Design and Test Considerations
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DAC
2002
ACM
14 years 7 months ago
The next chip challenge: effective methods for viable mixed technology SoCs
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
H. Bernhard Pogge
IPPS
2003
IEEE
14 years 16 hour ago
Distributed P2P Computing within Triana: A Galaxy Visualization Test Case
We discuss here a parallel implementation of the visualisation of data from a galaxy formation simulation within the Triana problem-solving environment. The visualisation is a tes...
Ian J. Taylor, Matthew S. Shields, Ian Wang, Roger...
ICCAD
2007
IEEE
144views Hardware» more  ICCAD 2007»
14 years 3 months ago
Voltage island-driven floorplanning
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
Qiang Ma, Evangeline F. Y. Young
AUIC
2004
IEEE
13 years 10 months ago
What Makes a Good User Interface Pattern Language?
A developer of user interfaces (UI) should be able to employ a user interface pattern language to design acceptable user interfaces. But, what makes a good pattern language? Three...
Elisabeth G. Todd, Elizabeth A. Kemp, Chris Philli...
IPTPS
2003
Springer
13 years 12 months ago
Structured Peer-to-Peer Overlays Need Application-Driven Benchmarks
Considerable research effort has recently been devoted to the design of structured peer-to-peer overlays, a term we use to encompass Content-Addressable Networks (CANs), Distribut...
Sean C. Rhea, Timothy Roscoe, John Kubiatowicz