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» SoC Design and Test Considerations
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FMCAD
2007
Springer
13 years 10 months ago
Improved Design Debugging Using Maximum Satisfiability
In today's SoC design cycles, debugging is one of the most time consuming manual tasks. CAD solutions strive to reduce the inefficiency of debugging by identifying error sourc...
Sean Safarpour, Hratch Mangassarian, Andreas G. Ve...
DELTA
2008
IEEE
14 years 1 months ago
Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
Hans G. Kerkhoff, Jarkko J. M. Huijts
DATE
2002
IEEE
80views Hardware» more  DATE 2002»
13 years 11 months ago
Test Planning and Design Space Exploration in a Core-Based Environment
This paper proposes a comprehensive model for test planning in a core-based environment. The main contribution of this work is the use of several types of TAMs and the considerati...
Érika F. Cota, Luigi Carro, Marcelo Lubasze...
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
13 years 10 months ago
Testing of Quantum Dot Cellular Automata Based Designs
There has been considerable research on quantum dots cellular automata as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is a majorit...
Mehdi Baradaran Tahoori, Fabrizio Lombardi
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
14 years 3 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...