98 search results - page 8 / 20 » Soft error rate analysis for sequential circuits |
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present an accurate but very fast soft error rate (SER) estimation technique for digital circuits based on error propagation probability (EPP) computation. Exper...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
ISCAS
2003
IEEE
14 years 27 days ago
2003
IEEE
Tunneling based random-access memories (TRAM’s) have recently garnered a great amount of interests among the memory designers due to their intrinsic merits such as reduced power...
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...