A fundamental problem in timing-driven physical synthesis is the reduction of critical paths in a design. In this work, we propose a powerful new technique that moves (and can als...
Michael D. Moffitt, David A. Papa, Zhuo Li, Charle...
In this paper, we present our experiences concerning the enforcement of access rights extracted from ODRL-based digital contracts. We introduce the generalized Contract Schema (Co...
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...