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DAC
2007
ACM
14 years 1 months ago
Verification Methodologies in a TLM-to-RTL Design Flow
SoC based system developments commonly employ ESL design ogies and utilize multiple levels of abstract models to provide feasibility study models for architects and development pl...
Atsushi Kasuya, Tesh Tesfaye
CODES
2006
IEEE
14 years 1 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
ISORC
2009
IEEE
14 years 4 months ago
Extended RT-Component Framework for RT-Middleware
Modular component-based robot systems require not only an infrastructure for component management, but also scalability as well as real-time properties. Robot Technology (RT)-Midd...
Hiroyuki Chishiro, Yuji Fujita, Akira Takeda, Yuta...
LCTRTS
2004
Springer
14 years 3 months ago
Link-time optimization of ARM binaries
The overhead in terms of code size, power consumption and execution time caused by the use of precompiled libraries and separate compilation is often unacceptable in the embedded ...
Bruno De Bus, Bjorn De Sutter, Ludo Van Put, Domin...
DAC
2004
ACM
14 years 1 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...