Sciweavers

123 search results - page 20 / 25
» Software Architecture Synthesis for Retargetable Real-time E...
Sort
View
CODES
2007
IEEE
14 years 2 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
14 years 8 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
FPL
2005
Springer
98views Hardware» more  FPL 2005»
14 years 1 months ago
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
Gareth W. Morris, George A. Constantinides, Peter ...
IISWC
2008
IEEE
14 years 2 months ago
On the representativeness of embedded Java benchmarks
— Java has become one of the predominant languages for embedded and mobile platforms due to its architecturally neutral design, portability, and security. But Java execution in t...
Ciji Isen, Lizy Kurian John, Jung Pil Choi, Hyo Ju...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
14 years 7 days ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli