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» Software Cache Coherence for Large Scale Multiprocessors
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ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 9 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
SIGOPSE
1996
ACM
13 years 11 months ago
How to scale transactional storage systems
Applications of the future will need to support large numbers of clients and will require scalable storage systems that allow state to be shared reliably. Recent research in distr...
Liuba Shrira, Barbara Liskov, Miguel Castro, Atul ...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
14 years 8 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
ISCA
2003
IEEE
116views Hardware» more  ISCA 2003»
14 years 25 days ago
A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay
Debuggers have been proven indispensable in improving software reliability. Unfortunately, on most real-life software, debuggers fail to deliver their most essential feature — a...
Min Xu, Rastislav Bodík, Mark D. Hill
CAL
2010
13 years 4 months ago
SMT-Directory: Efficient Load-Load Ordering for SMT
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
A. Hilton, A. Roth