107 search results - page 9 / 22 » Software Cache Coherence for Large Scale Multiprocessors |
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
HPCA
1999
IEEE
13 years 12 months ago
1999
IEEE
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blocks for software distributed shared memory systems. Two distinct approaches hav...
ISCA
2000
IEEE
13 years 12 months ago
2000
IEEE
While architects understandhow to build cost-effective parallel machines across a wide spectrum of machine sizes (ranging from within a single chip to large-scale servers), the re...
WMPI
2004
ACM
14 years 29 days ago
2004
ACM
Abstract. Recent research indicates that prediction-based coherence optimizations offer substantial performance improvements for scientific applications in distributed shared memor...
ISCAPDCS
2004
13 years 9 months ago
2004
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...