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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 5 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
IPPS
2006
IEEE
14 years 2 months ago
Implementation of a reconfigurable hard real-time control system for mechatronic and automotive applications
Control algorithms implemented directly in hardware take advantage of parallel signal processing. Furthermore, implementing controller functionality in reconfigurable hardware fac...
Steffen Toscher, Roland Kasper, Thomas Reinemann
FPL
2008
Springer
96views Hardware» more  FPL 2008»
13 years 10 months ago
Low-latency high-bandwidth HW/SW communication in a virtual memory environment
Adaptive computers combine conventional software programmable processors with reconfigurable compute units. We present techniques that allow the high-performance realization of de...
Holger Lange, Andreas Koch
FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
14 years 13 days ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
DATE
2002
IEEE
115views Hardware» more  DATE 2002»
14 years 1 months ago
Design Technology for Networked Reconfigurable FPGA Platforms
Future networked appliances should be able to download new services or upgrades from the network and execute them locally. This flexibility is typically achieved by processors tha...
Steve Guccione, Diederik Verkest, Ivo Bolsens