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ATVA
2009
Springer
97views Hardware» more  ATVA 2009»
13 years 11 months ago
Memory Usage Verification Using Hip/Sleek
Embedded systems often come with constrained memory footprints. It is therefore essential to ensure that software running on such platforms fulfils memory usage specifications at c...
Guanhua He, Shengchao Qin, Chenguang Luo, Wei-Ngan...
CODES
2005
IEEE
14 years 10 days ago
Automated data cache placement for embedded VLIW ASIPs
Memory bandwidth issues present a formidable bottleneck to accelerating embedded applications, particularly data bandwidth for multiple-issue VLIW processors. Providing an efficie...
Paul Morgan, Richard Taylor, Japheth Hossell, Geor...
DATE
2007
IEEE
68views Hardware» more  DATE 2007»
14 years 4 months ago
A sophisticated memory test engine for LCD display drivers
Economic testing of small devices like LCD drivers is a real challenge. In this paper we describe an approach where a production tester is extended by a memory test engine (MTE). ...
Oliver Spang, Hans Martin von Staudt, Michael G. W...
GLVLSI
2007
IEEE
154views VLSI» more  GLVLSI 2007»
14 years 4 months ago
A design kit for a fully working shared memory multiprocessor on FPGA
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template ar...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
IPM
2006
106views more  IPM 2006»
13 years 10 months ago
The information seeking behaviour of the users of digital scholarly journals
The article employs deep log analysis (DLA) techniques, a more sophisticated form of transaction log analysis, to demonstrate what usage data can disclose about information seekin...
David Nicholas, Paul Huntington, Hamid R. Jamali M...