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ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 7 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
103
Voted
NLDB
2001
Springer
15 years 7 months ago
"Where Are the Christmas Decorations?": A Memory Assistant for Storage Locations
At Hewlett-Packard Laboratories we want to know how inexpensive it can be to endow mobile personal assistants with the ability to speak naturally with their users. To this end, we ...
Lewis G. Creary, Michael VanHilst
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
15 years 7 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...
131
Voted
HPCA
1996
IEEE
15 years 6 months ago
Improving Release-Consistent Shared Virtual Memory Using Automatic Update
Shared virtual memory is a software technique to provide shared memory on a network of computers without special hardware support. Although several relaxed consistency models and ...
Liviu Iftode, Cezary Dubnicki, Edward W. Felten, K...
103
Voted
DATE
2010
IEEE
130views Hardware» more  DATE 2010»
15 years 6 months ago
Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller
Abstract—Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability. We p...
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming C...