2512 search results - page 203 / 503 » Software Transactional Memory |
116
Voted
IPPS
1996
IEEE
15 years 6 months ago
1996
IEEE
We introduce dag consistency, a relaxed consistency model for distributed shared memory which is suitable for multithreaded programming. We have implemented dag consistency in sof...
145
Voted
ASPLOS
2006
ACM
15 years 8 months ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
126
Voted
SAC
2004
ACM
15 years 8 months ago
2004
ACM
Web cache replacement algorithms have received a lot of attention during the past years. Though none of the proposed algorithms deals efficiently with all the particularities of t...
142
click to vote
ISCA
2002
IEEE
15 years 7 months ago
2002
IEEE
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
162
click to vote
ISCA
1995
IEEE
15 years 6 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...