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VIS
2007
IEEE
169views Visualization» more  VIS 2007»
14 years 10 months ago
Transform Coding for Hardware-accelerated Volume Rendering
Hardware-accelerated volume rendering using the GPU is now the standard approach for real-time volume rendering, although limited graphics memory can present a problem when renderi...
Nathaniel Fout, Kwan-Liu Ma
VIS
2004
IEEE
174views Visualization» more  VIS 2004»
14 years 10 months ago
A Graphics Hardware-Based Vortex Detection and Visualization System
Feature detection in flow fields is a well researched area, but practical application is often difficult due to the numerical complexity of the algorithms preventing interactive u...
Simon Stegmaier, Thomas Ertl
DAC
2009
ACM
14 years 10 months ago
Mode grouping for more effective generalized scheduling of dynamic dataflow applications
For a number of years, dataflow concepts have provided designers of digital signal processing systems with environments capable of expressing high-level software architectures as ...
William Plishker, Nimish Sane, Shuvra S. Bhattacha...
DAC
2000
ACM
14 years 10 months ago
Hardware-software co-design of embedded reconfigurable architectures
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
Yanbing Li, Tim Callahan, Ervan Darnell, Randolph ...
DAC
2004
ACM
14 years 10 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...