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RSP
2003
IEEE
176views Control Systems» more  RSP 2003»
14 years 22 days ago
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, A...
IJNSEC
2008
106views more  IJNSEC 2008»
13 years 7 months ago
Parallel Hardware Architectures for the Cryptographic Tate Pairing
Identity-based cryptography uses pairing functions,which are sophisticated bilinear maps defined on elliptic curves.Computing pairings efficiently in software is presently a relev...
Guido Marco Bertoni, Luca Breveglieri, Pasqualina ...
ICST
2009
IEEE
13 years 5 months ago
Proving Functional Equivalence of Two AES Implementations Using Bounded Model Checking
Bounded model checking--as well as symbolic equivalence checking--are highly successful techniques in the hardware domain. Recently, bit-vector bounded model checkers like CBMC ha...
Hendrik Post, Carsten Sinz
IPPS
2006
IEEE
14 years 1 months ago
On-chip and on-line self-reconfigurable adaptable platform: the non-uniform cellular automata case
In spite of the high parallelism exhibited by cellular automata architectures, most implementations are usually run in software. For increasing execution parallelism, hardware imp...
Andres Upegui, Eduardo Sanchez
PPOPP
2009
ACM
14 years 8 months ago
Transactional memory with strong atomicity using off-the-shelf memory protection hardware
This paper introduces a new way to provide strong atomicity in an implementation of transactional memory. Strong atomicity lets us offer clear semantics to programs, even if they ...
Martín Abadi, Tim Harris, Mojtaba Mehrara