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DATE
2010
IEEE
161views Hardware» more  DATE 2010»
14 years 1 months ago
Aging-resilient design of pipelined architectures using novel detection and correction circuits
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
Hamed F. Dadgour, Kaustav Banerjee
WICSA
2004
13 years 10 months ago
Compositional Generation of Software Architecture Performance QN Models
Early performance analysis based on Queueing Network Models (QNM) has been often proposed to support software designers during the software development process. These approaches a...
Antinisca Di Marco, Paola Inverardi
MMSEC
2006
ACM
132views Multimedia» more  MMSEC 2006»
14 years 2 months ago
On achievable security levels for lattice data hiding in the known message attack scenario
This paper presents a theoretical security analysis of lattice data hiding. The security depends on the secrecy of a dither signal that randomizes the codebook. If the same secret...
Luis Pérez-Freire, Fernando Pérez-Go...
ICSE
2007
IEEE-ACM
14 years 8 months ago
Behaviour Model Synthesis from Properties and Scenarios
Synthesis of behaviour models from software development artifacts such as scenario-based descriptions or requirements specifications not only helps significantly reduce the effort...
Greg Brunet, Marsha Chechik, Sebastián Uchi...
ICCD
2002
IEEE
122views Hardware» more  ICCD 2002»
14 years 5 months ago
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example
Fault-tolerant distributed real-time systems are presently facing a lot of new challenges. Although many techniques provide effective masking of node failures on the architectural...
Andreas Steininger, Johann Vilanek