Sciweavers

7027 search results - page 94 / 1406
» Software process: a roadmap
Sort
View
DATE
2005
IEEE
108views Hardware» more  DATE 2005»
14 years 3 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
ISQED
2002
IEEE
126views Hardware» more  ISQED 2002»
14 years 3 months ago
Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
Nicholas Chia-Yuan Chang, Yao-Wen Chang, Iris Hui-...
IJWET
2010
83views more  IJWET 2010»
13 years 8 months ago
Technically approaching the semantic web bottleneck
: After several years of research, the fundamental Semantic Web technologies have reached a high maturity level. Nevertheless, the average Web user has not yet taken advantage of t...
Nikolaos Konstantinou, Dimitrios-Emmanuel Spanos, ...
WETICE
1998
IEEE
14 years 2 months ago
A Deontic Formalism for Co-ordinating Software Development in Virtual Software Corporations
The concept of the Virtual Software Corporation (VSC) has recently become a practical reality as a result of advances in communication and distributed technologies. However, there...
Zsolt Haag, Richard Foley, Julian Newman
PROFES
2001
Springer
14 years 2 months ago
Evaluation of the E3 Process Modelling Language and Tool for the Purpose of Model Creation
In this paper, we report from an experiment which compared the E3 PML with respect to the standard modelling language IDEF0 for the purpose of model construction. The experiment ha...
Maria Letizia Jaccheri, Tor Stålhane