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» Software transactional memory for multicore embedded systems
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DAC
2004
ACM
14 years 8 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
LCPC
2007
Springer
14 years 1 months ago
Pillar: A Parallel Implementation Language
Abstract. As parallelism in microprocessors becomes mainstream, new programming languages and environments are emerging to meet the challenges of parallel programming. To support r...
Todd Anderson, Neal Glew, Peng Guo, Brian T. Lewis...
TCOS
2010
13 years 2 months ago
Green Secure Processors: Towards Power-Efficient Secure Processor Design
With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the softwar...
Siddhartha Chhabra, Yan Solihin
CSREAPSC
2006
13 years 9 months ago
Design and Implementation of SONICA (Service Oriented Network Interoperability for Component Adaptation) for Multimedia Pervasiv
Abstract - Recent advances in multimedia network systems have led to the development of a new generation of applications that associate the use of various multimedia objects. The c...
Hiroshi Hayakawa, Takahiro Koita, Kenya Sato
IOLTS
2005
IEEE
163views Hardware» more  IOLTS 2005»
14 years 1 months ago
Modeling Soft-Error Susceptibility for IP Blocks
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
Robert C. Aitken, Betina Hold