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» Software transactional memory for multicore embedded systems
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IPPS
2009
IEEE
14 years 2 months ago
Implementing OpenMP on a high performance embedded multicore MPSoC
In this paper we discuss our initial experiences adapting OpenMP to enable it to serve as a programming model for high performance embedded systems. A high-level programming model...
Barbara M. Chapman, Lei Huang, Eric Biscondi, Eric...
ASPLOS
2010
ACM
13 years 11 months ago
Orthrus: efficient software integrity protection on multi-cores
This paper proposes an efficient hardware/software system that significantly enhances software security through diversified replication on multi-cores. Recent studies show that a ...
Ruirui Huang, Daniel Y. Deng, G. Edward Suh
EMSOFT
2006
Springer
13 years 11 months ago
Reliability mechanisms for file systems using non-volatile memory as a metadata store
Portable systems such as cell phones and portable media players commonly use non-volatile RAM (NVRAM) to hold all of their data and metadata, and larger systems can store metadata...
Kevin M. Greenan, Ethan L. Miller
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
13 years 5 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
IEEEPACT
2009
IEEE
13 years 5 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...