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» Some Experiments with the Performance of LAMP Architecture
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GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 16 days ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
IPPS
2009
IEEE
14 years 2 months ago
Early experiences on accelerating Dijkstra's algorithm using transactional memory
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
Nikos Anastopoulos, Konstantinos Nikas, Georgios I...
PPOPP
1993
ACM
13 years 11 months ago
Integrating Message-Passing and Shared-Memory: Early Experience
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
David A. Kranz, Kirk L. Johnson, Anant Agarwal, Jo...
HIPC
2004
Springer
14 years 25 days ago
Performance Characteristics of a Cosmology Package on Leading HPC Architectures
Abstract. The Cosmic Microwave Background (CMB) is a snapshot of the Universe some 400,000 years after the Big Bang. The pattern of anisotropies in the CMB carries a wealth of info...
Jonathan Carter, Julian Borrill, Leonid Oliker
MASCOTS
2004
13 years 8 months ago
Architecture Independent Performance Characterization and Benchmarking for Scientific Applications
A simple, tunable, synthetic benchmark with a performance directly related to applications would be of great benefit to the scientific computing community. In this paper, we prese...
Erich Strohmaier, Hongzhang Shan