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» Sorting and Selection on Distributed Memory Bus Computers
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ASAP
2008
IEEE
82views Hardware» more  ASAP 2008»
14 years 3 months ago
Run-time thread sorting to expose data-level parallelism
We address the problem of data parallel processing for computational quantum chemistry (CQC). CQC is a computationally demanding tool to study the electronic structure of molecule...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...
IPPS
2009
IEEE
14 years 3 months ago
Optimizing assignment of threads to SPEs on the cell BE processor
The Cell is a heterogeneous multicore processor that has attracted much attention in the HPC community. The bulk of the computational workload on the Cell processor is carried by ...
C. Devi Sudheer, T. Nagaraju, Pallav K. Baruah, As...
IPPS
1999
IEEE
14 years 26 days ago
The Impact of Memory Hierarchies on Cluster Computing
Using off-the-shelf commodity workstations and PCs to build a cluster for parallel computing has become a common practice. A choice of a cost-effective cluster computing platform ...
Xing Du, Xiaodong Zhang
HPCA
2007
IEEE
14 years 9 months ago
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling
Performance gains in memory have traditionally been obtained by increasing memory bus widths and speeds. The diminishing returns of such techniques have led to the proposal of an ...
Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. ...
FTTCS
2006
132views more  FTTCS 2006»
13 years 8 months ago
Algorithms and Data Structures for External Memory
Data sets in large applications are often too massive to fit completely inside the computer's internal memory. The resulting input/output communication (or I/O) between fast ...
Jeffrey Scott Vitter