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» Sorting and Selection on Distributed Memory Bus Computers
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ICPADS
2007
IEEE
14 years 2 months ago
Optimizing Katsevich image reconstruction algorithm on multicore processors
The Katsevich image reconstruction algorithm is the first theoretically exact cone beam image reconstruction algorithm for a helical scanning path in computed tomography (CT). Ho...
Eric Fontaine, Hsien-Hsin S. Lee
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 5 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
IEEEPACT
2006
IEEE
14 years 2 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan
SPAA
2003
ACM
14 years 1 months ago
Performance comparison of MPI and three openMP programming styles on shared memory multiprocessors
When using a shared memory multiprocessor, the programmer faces the selection of the portable programming model which will deliver the best performance. Even if he restricts his c...
Géraud Krawezik
HPCA
2009
IEEE
14 years 9 months ago
PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
Mainak Chaudhuri