234 search results - page 5 / 47 » Sorting and Selection on Distributed Memory Bus Computers |
EUROPAR
1997
Springer
14 years 22 days ago
1997
Springer
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
HPDC
1999
IEEE
14 years 26 days ago
1999
IEEE
Advances in network technology continue to improve the communication performance of workstation and PC clusters, making high-performance workstation-clustercomputing increasingly ...
HPCA
2005
IEEE
14 years 9 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper, we present a novel approach for parallel sorting on stream processing architectures. It is based on adaptive bitonic sorting. For sorting n values utilizing p strea...
HPCA
2007
IEEE
14 years 9 months ago
2007
IEEE
Utilizing the nonuniform latencies of SDRAM devices, access reordering mechanisms alter the sequence of main memory access streams to reduce the observed access latency. Using a r...