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ISCAS
1999
IEEE
86views Hardware» more  ISCAS 1999»
14 years 1 months ago
An algorithm for the verification of timing diagrams realizability
In this paper, we present a new method for verifying the realizability of a timing diagram with linear timing constraints, thus ensuring that the implementation of the underlying ...
A. El-Aboudi, El Mostapha Aboulhamid
DATE
2005
IEEE
107views Hardware» more  DATE 2005»
14 years 2 months ago
On Statistical Timing Analysis with Inter- and Intra-Die Variations
In this paper, we highlight a fast, effective and practical statistical approach that deals with inter and intra-die variations in VLSI chips. Our methodology is applied to a numb...
Hratch Mangassarian, Mohab Anis
ESOA
2006
14 years 19 days ago
Dynamic Decentralized Any-Time Hierarchical Clustering
Hierarchical clustering is used widely to organize data and search for patterns. Previous algorithms assume that the body of data being clustered is fixed while the algorithm runs...
H. Van Dyke Parunak, Richard Rohwer, Theodore C. B...
ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
14 years 22 days ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
ORL
1998
68views more  ORL 1998»
13 years 8 months ago
A fast bipartite network flow algorithm for selective assembly
Bipartite network flow problems naturally arise in applications such as selective assembly and preemptive scheduling. This paper presents fast algorithms for these problems that ...
Satoru Iwata, Tomomi Matsui, S. Thomas McCormick