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» Specify, Compile, Run: Hardware from PSL
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DASIP
2010
13 years 2 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...
TOPLAS
2008
101views more  TOPLAS 2008»
13 years 7 months ago
Verifying policy-based web services security
WS-SecurityPolicy is a declarative language for configuring web services security mechanisms. We describe a formal semantics for WS-SecurityPolicy and propose a more abstract lang...
Karthikeyan Bhargavan, Cédric Fournet, Andr...
DAC
2008
ACM
14 years 8 months ago
Formal datapath representation and manipulation for implementing DSP transforms
We present a domain-specific approach to representing datapaths for hardware implementations of linear signal transform algorithms. We extend the tensor structure for describing l...
Franz Franchetti, James C. Hoe, Markus Püsche...
ASAP
2002
IEEE
85views Hardware» more  ASAP 2002»
14 years 15 days ago
Predictable Instruction Caching for Media Processors
The determinism of instruction cache performance can be considered a major problem in multi-media devices which hope to maximise their quality of service. If instructions are evic...
James Irwin, David May, Henk L. Muller, Dan Page
ISCA
2008
IEEE
205views Hardware» more  ISCA 2008»
14 years 1 months ago
VEAL: Virtualized Execution Accelerator for Loops
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
Nathan Clark, Amir Hormati, Scott A. Mahlke