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» Speculative Parallel Threading Architecture and Compilation
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IPPS
2003
IEEE
14 years 29 days ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
IPPS
1999
IEEE
13 years 12 months ago
Implementing a Non-Strict Functional Programming Language on a Threaded Architecture
Abstract. The combination of a language with ne-grain implicit parallelism and a data ow evaluation scheme is suitable for high-level programming on massively parallel architectur...
Shigeru Kusakabe, Kentaro Inenaga, Makoto Amamiya,...
ISCA
2003
IEEE
183views Hardware» more  ISCA 2003»
14 years 29 days ago
The Jrpm System for Dynamically Parallelizing Java Programs
We describe the Java runtime parallelizing machine (Jrpm), a complete system for parallelizing sequential programs automatically. Jrpm is based on a chip multiprocessor (CMP) with...
Michael K. Chen, Kunle Olukotun
PLDI
2004
ACM
14 years 1 months ago
Min-cut program decomposition for thread-level speculation
With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, al...
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykuma...
ISCAPDCS
2003
13 years 9 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee