Sciweavers

209 search results - page 29 / 42
» Speeding Up Constraint Propagation
Sort
View
ASPDAC
2005
ACM
111views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Wave-pipelined on-chip global interconnect
— A novel wave-pipelined global interconnect system is developed for reliable, high throughput, on-chip data communication. We argue that because there is only a single signal pr...
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 4 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani
ISLPED
2010
ACM
206views Hardware» more  ISLPED 2010»
13 years 8 months ago
Energy efficient implementation of parallel CMOS multipliers with improved compressors
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...
Dursun Baran, Mustafa Aktan, Vojin G. Oklobdzija
CVPR
2009
IEEE
14 years 2 months ago
Tubular anisotropy for 2D vessel segmentation
In this paper, we present a new approach for segmentation of tubular structures in 2D images providing minimal interaction. The main objective is to extract centerlines and bounda...
Fethallah Benmansour, Laurent D. Cohen, Max W. K. ...
CF
2010
ACM
14 years 29 days ago
Proposition for a sequential accelerator in future general-purpose manycore processors and the problem of migration-induced cach
As the number of transistors on a chip doubles with every technology generation, the number of on-chip cores also increases rapidly, making possible in a foreseeable future to des...
Pierre Michaud, Yiannakis Sazeides, André S...