134 search results - page 16 / 27 » Speeding Up Dynamic Shortest-Path Algorithms |
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...
ICIP
2008
IEEE
14 years 9 months ago
2008
IEEE
Dynamic-Contrast Enhanced MRI (DCE-MRI) is currently used as a complementary diagnosis tool to assess the malignancy of the liver tumor, called hepatoma, hepatocarcinoma, hepatoce...
ICS
2009
Tsinghua U.
14 years 6 days ago
2009
Tsinghua U.
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
ISSS
1995
IEEE
13 years 11 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
DAS
2006
Springer
13 years 11 months ago
2006
Springer
Traditional approaches to combining classifiers attempt to improve classification accuracy at the cost of increased processing. They may be viewed as providing an accuracy-speed tr...