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» Stable models and difference logic
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FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
14 years 22 days ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
CAV
2004
Springer
151views Hardware» more  CAV 2004»
13 years 11 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
CCS
2008
ACM
13 years 9 months ago
Formal analysis of SAML 2.0 web browser single sign-on: breaking the SAML-based single sign-on for google apps
Single-Sign-On (SSO) protocols enable companies to establish a federated environment in which clients sign in the system once and yet are able to access to services offered by dif...
Alessandro Armando, Roberto Carbone, Luca Compagna...
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 1 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
JOLLI
2008
95views more  JOLLI 2008»
13 years 7 months ago
Relational Modality
Saul Kripke's thesis that ordinary proper names are rigid designators is supported by widely shared intuitions about the occurrence of names in ordinary modal contexts. By th...
Kathrin Glüer, Peter Pagin