Sciweavers

250 search results - page 21 / 50
» Stages of Design in Technology for Global Development
Sort
View
ASYNC
2002
IEEE
124views Hardware» more  ASYNC 2002»
14 years 18 days ago
Synchronous Interlocked Pipelines
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Pe...
ISCAS
2006
IEEE
70views Hardware» more  ISCAS 2006»
14 years 1 months ago
A portable all-digital pulsewidth control loop for SOC applications
—A cell-based all-digital PWCL is presented in this paper. To improve design effort as well as facilitate systemlevel integration, the new design can be developed in hardware des...
Wei Wang, I-Chyn Wey, Chia-Tsun Wu, An-Yeu Wu
WISE
2007
Springer
14 years 1 months ago
Building the Presentation-Tier of Rich Web Applications with Hierarchical Components
Nowadays information systems are increasingly distributed and deployed within the Internet platform. Without any doubt, the World Wide Web represents the de facto standard platform...
Reda Kadri, Chouki Tibermacine, Vincent Le Gloahec
SEMWEB
2005
Springer
14 years 1 months ago
Representing Probabilistic Relations in RDF
Probabilistic inference will be of special importance when one needs to know how much we can say with what all we know given new observations. Bayesian Network is a graphical prob...
Yoshio Fukushige
ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
14 years 4 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha