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» State machine models of timing and circuit design
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TNN
2011
126views more  TNN 2011»
13 years 2 months ago
Video Time Encoding Machines
—We investigate architectures for time encoding and time decoding of visual stimuli such as natural and synthetic video streams (movies, animation). The architecture for time enc...
Aurel A. Lazar, Eftychios A. Pnevmatikakis
DAC
2000
ACM
14 years 8 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy
APSEC
2008
IEEE
14 years 2 months ago
Jackson's JSP-Like Method for State Transition Design
This paper presents an idea to apply Jackson’s JSP method, which is suitable for the transformation problem frame, into the state transition design, presented in the behavior pr...
Osamu Shigo
VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 8 months ago
Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
Samir Roy, Biplab K. Sikdar, Monalisa Mukherjee, D...
SAC
2006
ACM
13 years 7 months ago
Transformation of B specifications into UML class diagrams and state machines
We propose a rule-based approach for transforming B abstract machines into UML diagrams. We believe that important insight into the structure underlying a B model can be gained by...
Houda Fekih, Leila Jemni Ben Ayed, Stephan Merz