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» State machine models of timing and circuit design
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ISCAS
2006
IEEE
86views Hardware» more  ISCAS 2006»
14 years 1 months ago
Fast timing analysis of plane circuits via two-layer CNN-based modeling
Abstract— A fast timing analysis of plane circuits via two-layer CNNbased modeling, which is necessary for the solution of power/signal integrity problems in printed circuit boar...
Yuichi Tanji, Hideki Asai, Masayoshi Oda, Yoshifum...
IJFCS
1998
67views more  IJFCS 1998»
13 years 7 months ago
Vertex Splitting in Dags and Applications to Partial Scan Designs and Lossy Circuits
Directed acyclic graphs (dags) are often used to model circuits. Path lengths in such dags represent circuit delays. In the vertex splitting problem, the objective is to determine...
Doowon Paik, Sudhakar M. Reddy, Sartaj Sahni
SUTC
2006
IEEE
14 years 1 months ago
Design and Implementation of Ubiquitous Smart Cameras
Design aspects and software modelling for ubiquitous real-time camera system are described in this paper. We propose system architecture using a network of inexpensive cameras and...
Chang Hong Lin, Wayne Wolf, Andrew Dixon, Xenofon ...
VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
14 years 8 months ago
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
CIMCA
2006
IEEE
14 years 1 months ago
Timed-MPSG: A Formal Model for Real-Time Shop Floor Controller
The MPSG (Message-based Part State Graph) model has been developed for the execution portion of shop-floor controllers that operate in a distributed and hierarchical control envir...
Devinder Thapa, Jaeil Park, Gi-Nam Wang, Dongmin S...