1186 search results - page 30 / 238 » State machine models of timing and circuit design |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
INTEGRATION
2010
13 years 6 months ago
2010
1 — This paper presents a new design automation tool based on a modified genetic algorithm kernel, in order to increase efficiency on the analog circuit and system design cycle. ...
EUROCAST
2001
Springer
14 years 6 days ago
2001
Springer
CAST.FSM denotes a CAST tool which has been developed at the Institute of Systems Science at the University of Linz during the years 1986-1993. The first version of CAST.FSM was i...
CONCUR
2000
Springer
14 years 1 days ago
2000
Springer
Concurrency is an essential element of abstract models for embedded systems. Correctness and e ciency of the design depend critically on the way concurrency is formalized and imple...