1186 search results - page 5 / 238 » State machine models of timing and circuit design |
ITC
1999
IEEE
13 years 12 months ago
1999
IEEE
A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
ICCAD
1993
IEEE
13 years 11 months ago
1993
IEEE
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
JUCS
2008
13 years 7 months ago
2008
ISLPED
2003
ACM
14 years 27 days ago
2003
ACM
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
ICCS
2004
Springer
14 years 1 months ago
2004
Springer
: Synchronous finite state machines are very important for digital sequential designs. Among other important aspects, they represent a powerful way for synchronizing hardware comp...