119 search results - page 18 / 24 » Static Energy Reduction Techniques for Microprocessor Caches |
ASYNC
2004
IEEE
13 years 11 months ago
2004
IEEE
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
IPCCC
2007
IEEE
14 years 1 months ago
2007
IEEE
Leakage power is a major concern in current microarchitectures as it is increasing exponentially with decreasing transistor feature sizes. In this paper, we present a technique ca...
MICRO
1999
IEEE
13 years 12 months ago
1999
IEEE
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
PACS
2000
Springer
13 years 11 months ago
2000
Springer
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...