119 search results - page 19 / 24 » Static Energy Reduction Techniques for Microprocessor Caches |
CASES
2004
ACM
14 years 1 months ago
2004
ACM
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
CF
2005
ACM
13 years 9 months ago
2005
ACM
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay has variability...
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
DAC
2003
ACM
14 years 26 days ago
2003
ACM
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...