119 search results - page 23 / 24 » Static Energy Reduction Techniques for Microprocessor Caches |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Scratch-pad memory is becoming an important fixture in embedded multimedia systems. It is significantly more efficient than the cache, in performance and power, and has the add...
RTAS
2003
IEEE
14 years 25 days ago
2003
IEEE
Managing energy consumption has become vitally important to battery operated portable and embedded systems. A dynamic voltage scaling (DVS) technique reduces the processor’s dyn...
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
Abstract— In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed instead of caches, which can consume majority of processor power. Howe...
HPCA
2012
IEEE
12 years 3 months ago
2012
IEEE
Since the onset of pipelined processors, balancing the delay of the microarchitectural pipeline stages such that each microarchitectural pipeline stage has an equal delay has been...