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» Static Energy Reduction Techniques for Microprocessor Caches
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EMSOFT
2004
Springer
14 years 29 days ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
FCCM
2000
IEEE
133views VLSI» more  FCCM 2000»
14 years 4 hour ago
Configuration Caching Management Techniques for Reconfigurable Computing
Although run-time reconfigurable systems have been shown to achieve very high performance, the speedups over traditional microprocessor systems are limited by the cost of configur...
Zhiyuan Li, Katherine Compton, Scott Hauck
DAC
2003
ACM
14 years 25 days ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
MICRO
1999
IEEE
71views Hardware» more  MICRO 1999»
13 years 12 months ago
Selective Cache Ways: On-Demand Cache Resource Allocation
Increasing levels of microprocessor power dissipation call for new approaches at the architectural level that save energy by better matching of on-chip resources to application re...
David H. Albonesi
CODES
2004
IEEE
13 years 11 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel