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» Static Scheduling for Synchronous Data Flow Graphs
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ICPP
1998
IEEE
13 years 11 months ago
Concurrent SSA Form in the Presence of Mutual Exclusion
Most current compiler analysis techniques are unable to cope with the semantics introduced by explicit parallel and synchronization constructs in parallel programs. In this paper ...
Diego Novillo, Ronald C. Unrau, Jonathan Schaeffer
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 11 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
IEEEPACT
1999
IEEE
13 years 11 months ago
A Fully Asynchronous Superscalar Architecture
An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...
D. K. Arvind, Robert D. Mullins
ISSS
1997
IEEE
109views Hardware» more  ISSS 1997»
13 years 11 months ago
Reducing the Complexity of ILP Formulations for Synthesis
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases. There exists some tools that give an o...
Anne Mignotte, Olivier Peyran
EUROMICRO
1999
IEEE
13 years 11 months ago
An Improved Scheduling Technique for Time-Triggered Embedded Systems
In this paper we present an improved scheduling technique for the synthesis of time-triggered embedded systems. Our system model captures both the flow of data and that of control...
Paul Pop, Petru Eles, Zebo Peng