329 search results - page 5 / 66 » Static Timing Analysis Taking Crosstalk into Account |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Crosstalk noise has become an important issue as technology scales down for timing and signal integrity closure. Existing works to fix crosstalk noise are mostly done at the rout...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
ICCAD
2000
IEEE
14 years 20 hour ago
2000
IEEE
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...