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» Static performance prediction of skeletal parallel programs
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IPPS
2000
IEEE
14 years 26 days ago
Controlling Distributed Shared Memory Consistency from High Level Programming Languages
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
Yvon Jégou
ICCD
2003
IEEE
137views Hardware» more  ICCD 2003»
14 years 5 months ago
Dynamic Thread Resizing for Speculative Multithreaded Processors
There is a growing interest in the use of speculative multithreading to speed up the execution of a program. In speculative multithreading model, threads are extracted from a sequ...
Mohamed M. Zahran, Manoj Franklin
CCGRID
2001
IEEE
14 years 4 days ago
OVM: Out-of-Order Execution Parallel Virtual Machine
High performance computing on parallel architectures currently uses different approaches depending on the hardory model of the architecture, the abstraction level of the programmi...
George Bosilca, Gilles Fedak, Franck Cappello
PLDI
2011
ACM
12 years 11 months ago
Automatic CPU-GPU communication management and optimization
The performance benefits of GPU parallelism can be enormous, but unlocking this performance potential is challenging. The applicability and performance of GPU parallelizations is...
Thomas B. Jablin, Prakash Prabhu, James A. Jablin,...
ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
14 years 26 days ago
Understanding the backward slices of performance degrading instructions
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
Craig B. Zilles, Gurindar S. Sohi