328 search results - page 54 / 66 » Static performance prediction of skeletal parallel programs |
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
HPCA
2002
IEEE
14 years 7 months ago
2002
IEEE
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...
PPOPP
2010
ACM
13 years 5 months ago
2010
ACM
Many programs exploit shared-memory parallelism using multithreading. Threaded codes typically use locks to coordinate access to shared data. In many cases, contention for locks r...
ICPP
2003
IEEE
14 years 20 days ago
2003
IEEE
Automatic optimization of address offset assignment for DSP applications, which reduces the number of address arithmetic instructions to meet the tight memory size restrictions an...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...